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On-chip SRAM

Registers

~32 MB · >20 TB/s · ~0.5 ns

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Capacity
~32 MB
Bandwidth
>20 TB/s
Latency
~0.5 ns
Energy
~0.1 pJ/b
In plain English

The handful of numbers the GPU is touching this exact instant — like the figures lit up on a calculator's screen. Far too tiny to invest in on its own; the value sits with whoever designs the chip (NVIDIA, AMD) and whoever prints it (TSMC).

What it is

The fastest memory that exists. Each GPU Streaming Multiprocessor holds ~256 KB of register file — the operands of instructions in flight. ~32 MB aggregate on an H100.

The business

Not separately investable — it ships inside the GPU. The economics flow to whoever designs the GPU (NVIDIA, AMD) and the foundry that prints it (TSMC).

Bottleneck severity

Low

Who makes it

NVIDIANVDA

GPUs, NVLink, NVSwitch, photonic switches · USA (fab TSMC)

Buys the most HBM, NVLink and optics on earth and pre-buys supply to lock rivals out: ~60% of CoWoS, $2B each into Coherent and Lumentum (Mar 2026), $2B into Marvell. B300 (288 GB HBM3E) is the shipping reference GPU; Rubin (288 GB HBM4, 22 TB/s) samples Q4 2026, volume Q1 2027.

Rubin ramp timingsupply lockupsNVLink Fusion breadth
↗ Investor relations & news

AMDAMD

MI GPUs, EPYC CPUs, UALink · USA (fab TSMC)

MI-series GPUs with leading HBM capacity; the anchor of UALink. Zen 6 EPYC "Venice" launched July 2026 with roughly a year before Intel answers; MI400 carries the first UALink production silicon (H2 2026).

MI400 rampVenice share gainUALink silicon
↗ Investor relations & news

TSMCTSM

Logic + CoWoS packaging + HBM base dies + Si photonics · Taiwan

Makes the GPU die AND the CoWoS packaging that bonds HBM to it — and now the logic base die under SK Hynix's HBM4 too. CoWoS is heading for ~130k wafers/month by end-2026 and is still sold out into 2027 (NVIDIA alone holds ~60%); it is farming 240–270k wafers/year of front-end steps out to Amkor and SPIL. A Taiwan disruption stops the whole stack.

CoWoS wafers/monthOSAT outsourcing volumeHBM4 base-die share
↗ Investor relations & news

Metrics that move this layer

Where it comes from

KOR/USAGPU design — NVIDIA, AMD

Connected to

HBM3E / HBM4The Memory Wall